Note: this is not recommended to use as-is. A few updates to the design should be made to fix some design errors - see below.
This is a quad-channel, low noise, source/sink, high voltage amplifier for driving plate-capacitor electrostatic drives in the speed meter experiment. The design is based on previous incarnations evolved organically over the years by Andreas Weidner, Tobias Meier, and Tobias Eberle, all based at one point at the Max Planck Institute for Gravitational Wave Physics (Albert-Einstein-Institut) in Hannover, Germany.
The main changes I've made to previous designs are the support for multiple channels, the use of an integrated circuit with significantly lower quiescent current (leading to reduced heat sinking requirements), a digital interlock system and switchable 10dB dewhitening filters (used in order to prevent DAC quantisation noise from impacting on the output noise; see section 6.3.2 of my thesis).
The circuit includes a number of useful features:
- 0 to ±375 V differential output amplified from a 0 to ±10 V input
- Low output noise: around 30 µV/sqrt(Hz) between 10 Hz and 10 kHz on top of the ±375 V output rails
- Output current limiting
- Safety interlock which must be asserted active low by an external input in order for the device to output high voltages
- Overtemperature protection via four independent temperature sensors
- Two 10 dB, individually switchable dewhitening filters per channel, controlled by external input
- Soft-start protection to limit inrush current on switch-on (and discharge current on switch-off)
- Differential monitor channels to witness each output rail's signal
- Indicator LEDs
You must provide the high voltage supply rails. Unless you have a suitable power supply already, one approach could be to use a circuit based on the 1980 Michael Meida regulator design using MOSFETs like this one from Pete Millett - though this requires significantly more care as you have to handle mains voltages.
There are improvements that could be made to the circuit to fix some mistakes and design choices, some of which are discussed below.
This was one of my earliest "big" electronics projects, and I made a few mistakes. The biggest one is the output monitor: as it is not buffered, the impedance of the ADC used to measure the monitor signal contributes to a voltage drop across the current limit resistor. The division ends up being more like 1/1000 instead of 1/100 if an ADC with input impedance of a few kΩ is used. This can be fixed by buffering the monitor output with a voltage follower op-amp circuit and the voltage drop across the current limit resistor can also be mitigated by using an active current limiter circuit instead of passive. It's also possible to rely on the PA95 chips' current limiter, which can be set with a resistor, but relying on a single failure point is not recommended. The passive current limit resistor included in this design is nice because it almost always fails safe.
- The recommendation to use 0.1% resistors on the input is a bit pointless given the 1% resistors used in the next stages, and the digital switches that themselves have 25 Ω of on resistance. Gain errors created by resistor tolerance can be corrected with software calibration. Temperature driven changes in gain can be mitigated with appropriate choice of resistor material.
- The overvoltage blocking diodes in the supplies of the MAX4659s are not necessary given the capacitors there, and furthermore the capacitors should connect directly to the supplies instead.
- With no overtemperature signal at R110, there is a floating voltage which leads to an undefined state in the nearby switch and potentially degrade its life. A large resistor (e.g. 1 MΩ) should be added to ground here.
- The MAX4659 is not available in the DIP package used on the board, so I used adapters for surface mounted packages. I'd suggest just making these surface mount, or finding a different IC.