High voltage amplifier

As part of my thesis work I designed a quad-channel, low noise, high voltage amplifier for driving plate-capacitor electrostatic drives in the speed meter experiment. The design was based on previous incarnations evolved organically over the years by Andreas Weidner, Tobias Meier, and Tobias Eberle, all based at one point at the Max Planck Institute for Gravitational Wave Physics (Albert-Einstein-Institut) in Hannover, Germany.

The main changes I made were the support for multiple channels, the use of amplifiers with significantly lower quiescent current (leading to reduced heat sinking requirements), a digital interlock system and switchable 10dB dewhitening filters (used in order to prevent DAC quantisation noise from impacting on the output noise; see section 6.3.2 of my thesis).

Overall, the finished circuit includes a number of useful features:

  • 0 to ±375V differential output amplified from a 0 to ±10V input
  • Low output noise: around 30µV/sqrt(Hz) between 10Hz and 10kHz on top of the ±375V output rails
  • Output current limiting
  • Safety interlock which must be asserted active low by an external input in order for the device to output high voltages
  • Overtemperature protection via four independent temperature sensors
  • Two 10dB, individually switchable dewhitening filters per channel, controlled by external input
  • Soft-start protection to limit inrush current on switch-on (and discharge current on switch-off)
  • Differential monitor channels to witness each output rail’s signal
  • Indicator LEDs

You must provide the high voltage supply rails yourself. We use four Delta Elektronika ES 0300-0.45 units in series with a centre tap for ground, but this option is rather expensive. A brew-your-own approach might work – an update from the 1980 Michael Meida regulator design using MOSFETs like this one from Pete Millett could be adapted – though this requires significantly more care as you have to handle mains voltages.

Board design

While the schematic is useful, the board design is so specialised that it’s hardly worth covering. It was designed to fit inside a 19″, 2U rack unit for our experiment. We used L-shaped aluminium blocks as heat sinks connected to the enclosure. Due to manufacturing constraints we used through-hole components, but were I to redesign the board I would use surface mount components to benefit from their tolerance and (lower) stray inductance and capacitance.

The schematic and board design, along with a sort-of bill of materials (showing component sizes, more or less, but not manufacturers or SKUs) can be found in this handy document generated using Eagle and Andreas Weidner’s brilliant add-on package (available only to the GEO collaboration):

Quad differential high voltage amplifier

Feel free to use it, bearing in mind that it comes with absolutely no warranty, and should be treated as a potentially dangerous design given that I am not a chartered electrical engineer. The circuit is capable of sourcing large voltages with enough current to kill if you are not diligent about clearances and safety. You’ve been warned!

There are improvements that could be made to the circuit to fix some mistakes and short-sighted design choices, some of which are discussed below. If you do use it and/or adapt it, please let me know so I can get a warm fuzzy feeling!

Mistakes and future improvements

This was one of my earliest “big” electronics projects, and there were a few mistakes. The biggest one is the output monitor: as it is not buffered (in hindsight it should have been), the impedance of the ADC used to measure the monitor signal contributes to a voltage drop across the current limit resistor. The division ends up being more like 1/1000 instead of 1/100. This can be fixed by buffering the monitor output with an op-amp and the voltage drop across the current limit resistor can also be mitigated by using an active current limiter circuit instead of passive. It’s also possible to rely on the PA95 chips’ current limiter, which can be set with a resistor, but relying on a single failure point is not recommended. In fact, the passive current limit resistor approach is nice in principle because it almost always fails safe.

Other mistakes:

  • The recommendation to use 0.1% resistors on the input is a bit pointless given the 1% resistors used in the next stages, and the digital switches that themselves have 25Ω of on resistance. Gain errors created by resistor tolerance can be corrected with software calibration. Temperature driven changes in gain can be mitigated with appropriate choice of resistor material.
  • The overvoltage blocking diodes in the supplies of the MAX4659s are not necessary given the capacitors there, and furthermore the capacitors should connect directly to the supplies instead.
  • With no overtemperature signal at R110, there is a floating voltage which leads to an undefined state in the nearby switch and potentially degrade its life. A large resistor (e.g. 1MΩ) should be added to ground here.
  • The MAX4659 is not available in the DIP package used on the board, so I used adapters for surface mounted packages. I’d suggest just making these surface mount, or finding a different IC.